Re: Memory ordering issue in LWLockRelease, WakeupWaiters, WALInsertSlotRelease

From: Robert Haas <robertmhaas(at)gmail(dot)com>
To: Andres Freund <andres(at)2ndquadrant(dot)com>
Cc: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>, Florian Pflug <fgp(at)phlo(dot)org>, PostgreSQL-development Hackers <pgsql-hackers(at)postgresql(dot)org>, Heikki Linnakangas <hlinnakangas(at)vmware(dot)com>
Subject: Re: Memory ordering issue in LWLockRelease, WakeupWaiters, WALInsertSlotRelease
Date: 2014-02-17 19:06:43
Message-ID: CA+Tgmob29C_hnYR38OmxPSN2e42ZzMw1xT9Pi08=JALTanDZ0A@mail.gmail.com
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On Mon, Feb 17, 2014 at 1:55 PM, Andres Freund <andres(at)2ndquadrant(dot)com> wrote:
> On 2014-02-17 13:49:01 -0500, Robert Haas wrote:
>> On Sat, Feb 15, 2014 at 11:17 AM, Andres Freund <andres(at)2ndquadrant(dot)com> wrote:
>> > On 2014-02-15 16:18:00 +0100, Andres Freund wrote:
>> >> On 2014-02-15 10:06:41 -0500, Tom Lane wrote:
>> >> > Andres Freund <andres(at)2ndquadrant(dot)com> writes:
>> >> > > My current conclusion is that backporting barriers.h is by far the most
>> >> > > reasonable way to go. The compiler problems have been ironed out by
>> >> > > now...
>> >> >
>> >> > -1. IMO that code is still quite unproven, and what's more, the
>> >> > problem we're discussing here is completely hypothetical. If it
>> >> > were real, we'd have field evidence of it. We've not had that
>> >> > much trouble seeing instances of even very narrow race-condition
>> >> > windows in the past.
>> >>
>> >> Well, the problem is that few of us have access to interesting !x86
>> >> machines to run tests, and that's where we'd see problems (since x86
>> >> gives enough guarantees to avoid this unless the compiler reorders
>> >> stuff). I am personally fine with just using volatiles to avoid
>> >> reordering in the older branches, but Florian argued against it.
>> >
>> > Here's patches doing that. The 9.3 version also applies to 9.2; the 9.1
>> > version applies back to 8.4.
>>
>> I have no confidence that this isn't going to be real bad for performance.
>
> It's just a write barrier which evaluates to a pure compiler barrier on
> x86 anyway?
> And it's in a loop that's only entered when the kernel is entered anyway
> to wake up the other backend.
>
> What should that affect significantly?

On x86, presumably nothing. On other architectures, I don't know what
the impact is, but I don't accept a hand-wavy assertion that there
shouldn't be any as evidence that there won't be.

--
Robert Haas
EnterpriseDB: http://www.enterprisedb.com
The Enterprise PostgreSQL Company

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