Re: Latches with weak memory ordering (Re: max_wal_senders must die)

From: Greg Stark <gsstark(at)mit(dot)edu>
To: Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us>
Cc: Robert Haas <robertmhaas(at)gmail(dot)com>, Kevin Grittner <Kevin(dot)Grittner(at)wicourts(dot)gov>, Josh Berkus <josh(at)agliodbs(dot)com>, Andres Freund <andres(at)anarazel(dot)de>, Heikki Linnakangas <heikki(dot)linnakangas(at)enterprisedb(dot)com>, Aidan Van Dyk <aidan(at)highrise(dot)ca>, Bruce Momjian <bruce(at)momjian(dot)us>, pgsql-hackers(at)postgresql(dot)org
Subject: Re: Latches with weak memory ordering (Re: max_wal_senders must die)
Date: 2010-11-21 00:49:30
Message-ID: AANLkTi=-p3hmqz2-zaPFhcQk_-htzy9p3ad5d+qS9DzM@mail.gmail.com
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On Sat, Nov 20, 2010 at 9:07 PM, Tom Lane <tgl(at)sss(dot)pgh(dot)pa(dot)us> wrote:
> In practice we do not need to worry about changes made with a kernel
> call in between, as any sort of context swap will cause the kernel to
> force cache synchronization.
>

Note that not all kernel calls are equal these days. Some
(gettimeofday on Linux) are implemented as very lightweight calls that
don't do memory map changes and might not trigger the kinds of
synchronization you're talking about. Any IPC kernel calls like kill
will though I'm sure.

--
greg

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